skidl.circuit module

Handles complete circuits made of parts and nets.

class skidl.circuit.Circuit(**kwargs)[source]

Bases: skidl.skidlbaseobj.SkidlBaseObject

Class object that holds the entire netlist of parts and nets.

parts

List of all the schematic parts as Part objects.

nets

List of all the schematic nets as Net objects.

buses

List of all the buses as Bus objects.

hierarchy

A ‘.’-separated concatenation of the names of nested SubCircuits at the current time it is read.

level

The current level in the schematic hierarchy.

context

Stack of contexts for each level in the hierarchy.

ERC(*args, **kwargs)[source]

Run class-wide and local ERC functions on this circuit.

add_buses(*buses)[source]

Add some Bus objects to the circuit. Assign a bus name if necessary.

add_hierarchical_name(name)[source]

Record a new hierarchical name. Throw an error if it is a duplicate.

add_nets(*nets)[source]

Add some Net objects to the circuit. Assign a net name if necessary.

add_packages(*packages)[source]
add_parts(*parts)[source]

Add some Part objects to the circuit.

add_stuff(*stuff)[source]

Add Parts, Nets, Buses, and Interfaces to the circuit.

backup_parts(file_=None)[source]

Saves parts in circuit as a SKiDL library in a file.

Parameters

file – Either a file object that can be written to, or a string containing a file name, or None. If None, a standard library file will be used.

Returns

Nothing.

erc_list = [<function dflt_circuit_erc>]
generate_dot(file_=None, engine='neato', rankdir='LR', part_shape='rectangle', net_shape='point', splines=None, show_values=True, show_anon=False, split_nets=['GND'], split_parts_ref=[])[source]

Returns a graphviz graph as graphviz object and can also write it to a file/stream. When used in ipython the graphviz object will drawn as an SVG in the output.

See https://graphviz.readthedocs.io/en/stable/ and http://graphviz.org/doc/info/attrs.html

Parameters
  • file – A string containing a file name, or None.

  • engine – See graphviz documentation

  • rankdir – See graphviz documentation

  • part_shape – Shape of the part nodes

  • net_shape – Shape of the net nodes

  • splines – Style for the edges, try ‘ortho’ for a schematic like feel

  • show_values – Show values as external labels on part nodes

  • show_anon – Show anonymous net names

  • split_nets – splits up the plot for the given list of net names

  • split_parts_ref – splits up the plot for all pins for the given list of part refs

Returns

graphviz.Digraph

generate_graph(file_=None, engine='neato', rankdir='LR', part_shape='rectangle', net_shape='point', splines=None, show_values=True, show_anon=False, split_nets=['GND'], split_parts_ref=[])

Returns a graphviz graph as graphviz object and can also write it to a file/stream. When used in ipython the graphviz object will drawn as an SVG in the output.

See https://graphviz.readthedocs.io/en/stable/ and http://graphviz.org/doc/info/attrs.html

Parameters
  • file – A string containing a file name, or None.

  • engine – See graphviz documentation

  • rankdir – See graphviz documentation

  • part_shape – Shape of the part nodes

  • net_shape – Shape of the net nodes

  • splines – Style for the edges, try ‘ortho’ for a schematic like feel

  • show_values – Show values as external labels on part nodes

  • show_anon – Show anonymous net names

  • split_nets – splits up the plot for the given list of net names

  • split_parts_ref – splits up the plot for all pins for the given list of part refs

Returns

graphviz.Digraph

generate_netlist(**kwargs)[source]

Return a netlist and also write it to a file/stream.

Parameters
  • file – Either a file object that can be written to, or a string containing a file name, or None.

  • tool – The EDA tool the netlist will be generated for.

  • do_backup – If true, create a library with all the parts in the circuit.

Returns

A netlist.

generate_netlistsvg_skin(net_stubs)[source]

Generate the skin file of symbols for use by netlistsvg.

generate_pcb(**kwargs)[source]

Create a PCB file from the circuit.

Parameters
  • file – Either a file object that can be written to, or a string containing a file name, or None.

  • tool – The EDA tool the netlist will be generated for.

  • do_backup – If true, create a library with all the parts in the circuit.

Returns

None.

generate_schematic(file_=None, tool=None)[source]

Create a schematic file. THIS DOES NOT WORK!

generate_svg(file_=None, tool=None)[source]

Create an SVG file displaying the circuit schematic and return the dictionary that can be displayed by netlistsvg.

generate_xml(file_=None, tool=None)[source]

Return netlist as an XML string and also write it to a file/stream.

Parameters

file – Either a file object that can be written to, or a string containing a file name, or None.

Returns

A string containing the netlist.

get_nets()[source]

Get all the distinct nets for the circuit.

instantiate_packages()[source]

Run the package executables to instantiate their circuitry.

mini_reset(init=False)[source]

Clear any circuitry but don’t erase any loaded part libraries.

reset(init=False)[source]

Clear any circuitry and cached part libraries and start over.

rmv_buses(*buses)[source]

Remove some buses from the circuit.

rmv_hierarchical_name(name)[source]

Remove an existing hierarchical name. Throw an error if non-existent.

rmv_nets(*nets)[source]

Remove some Net objects from the circuit.

rmv_packages(*packages)[source]
rmv_parts(*parts)[source]

Remove some Part objects from the circuit.

rmv_stuff(*stuff)[source]

Remove Parts, Nets, Buses, and Interfaces from the circuit.

skidl.circuit.SubCircuit(f)[source]

A @SubCircuit decorator is used to create hierarchical circuits.

Parameters

f – The function containing SKiDL statements that represents a subcircuit.

skidl.circuit.subcircuit(f)

A @SubCircuit decorator is used to create hierarchical circuits.

Parameters

f – The function containing SKiDL statements that represents a subcircuit.